The Fairchild CLIPPER: Instruction Set Architecture and Processor
The Fairchild CLIPPER: Instruction Set Architecture and Processor
Walter Hollingsworth,Howard Sachs,A. Smith
1987
2 Citations
TLDR
The instruction set architecture of CLIPPER is described, the chip design architecture and the interesting features of the implementation are described, and some comments on the RISC vs. CISC issue are given.