Optimizing HQC using Frobenius Additive FFT on a RISC-V-based System-on-Chip
Optimizing HQC using Frobenius Additive FFT on a RISC-V-based System-on-Chip
Antonio Ras,Antoine Loiseau,4 Authors,E. Valea
0 Citations
TLDR
This paper presents an alternative polynomial multiplication technique for HQC: the Frobenius Additive Fast Fourier Transform (FAFFT), which provides significant algorithmic-level performance improvements and is presented as the first state-of-the-art hardware implementation of FAFFT.