Enhancing Reinforcement Learning for the Floorplanning of Analog ICs with Beam Search

The layout of analog ICs requires making complex trade-offs, while addressing device physics and variability of the circuits. This makes full automation with learning-based solutions hard to achieve. However, reinforcement learning (RL) has recently reached significant results, particularly in solving the floorplanning problem. This paper presents a hybrid method that combines RL with a beam search (BS) strategy. The BS algorithm enhances the agent’s inference process, allowing for the generation of flexible floorplans by accommodating various objective weightings, and addressing congestion without the need for policy retraining or fine-tuning. Moreover, the RL agent’s generalization ability stays intact, along with its efficient handling of circuit features and constraints. Experimental results show ~5−85% improvement in area, dead space and half-perimeter wire length compared to a standard RL application, along with higher rewards for the agent. Moreover, performance and efficiency align closely with those of existing state-of-the-art techniques.