Design of Low-Drop-Out Voltage Regulator using CMOS Technology for Microprocessor Applications

The demand for electronic devices has increased due to continuous change in technology and its parameters. Low-Drop-Out [LDO] voltage regulator is utilised for power management and avoids unstable voltage in many electronicapplications.In this present investigation, a comprehensive characterization of a LDO in Complementary metal oxide semi-conductor technology [CMOS] is simulated using mentor graphics tool. The error amplifier of the low-drop-out voltage employed using 7 transistors for current mirroring technique. To manage the voltage differential, a pass transistor is created in a similar way utilising PMOS. Resistors and capacitors are passive components used in feedback network circuits and to reduce output voltage volatility, respectively. The suggested circuit achieves 140 mV of dropout voltage with a constant voltage of 1.6 V with a supply voltage range of 2 to 4.2 V and 4.16 mW of power consumption..