Design of a Programmable Low Power Low Drop-Out Regulator
Design of a Programmable Low Power Low Drop-Out Regulator
Jayanthi Vanama,Sampoorna G.L
2013 · DOI: 10.5121/VLSIC.2013.4309
Symposium on VLSI Circuits · 3 Citations
TLDR
A low power programmable low drop-out regulator capable of providing 1V output has been proposed and provides a DC gain and a maximum DC Power Supply Rejection Ratio of -35 dB and a worst case PSRR of -20 dB.