An architecture for the direct execution of the Forth programming language
An architecture for the direct execution of the Forth programming language
J. Hayes,M. Fraeman,Robert L. Williams,T. Zaremba
1987 · DOI: 10.1145/36206.36182
International Conference on Architectural Support for Programming Languages and Operating Systems · 23 Citations
TLDR
A simple direct execution architecture for a 32 bit Forth microprocessor that can directly access a linear address space of over 4 gigawords and on-chip stack caches allow most Forth primitives to execute in a single cycle.
Abstract
We have developed a simple direct execution architecture for a 32 bit Forth microprocessor. The processor can directly access a linear address space of over 4 gigawords. Two instruction types are defined; a subroutine call, and a user defined microcode instruction. On-chip stack caches allow most Forth primitives to execute in a single cycle.