A Through Silicon Via (TSV) Architecture of the Bumpless Build Cube (BBCube) for Stacked Memory Devices

This paper describes the architecture of the wafer-on-wafer (WOW) via-last through silicon via (TSV), named Bumpless Build Cube-TSV (BBCube-TSV). At first, the three types of TSVs, $\mu$ -bump technology, hybrid bonding technology, and BBCube-TSV are overviewed, addressing the detailed structures and the opportunities of applying for 3D-memories. Then, the process steps of the BBCube-TSV are summarized to figure out the key process steps. Three types of applications are reviewed to illustrate and discuss the potentiality of the BBCube-TSV to enhance 3D-memories, power delivery wiring in processor on stacked memory devices, and advantage in defect management with sophisticated ideas on stacked memories. The simplicity of the structure and the occupation of copper in the TSV structure are found to provide the advantages. The role of the TSV as a vertical interconnect in the hierarchy of multilayer wiring is discussed.