A High-Performance, Hierarchical Decoupled Architecture
A High-Performance, Hierarchical Decoupled Architecture
S. Crago,Apoorv Srivastava,K. Obenland
1996
10 Citations
TLDR
The performance advantage of the HiDISC architecture increases as the miss penalty gets larger relative to processor cycles, making it an attractive architecture as the difference between proces-sor speed and DRAM speed continues to grow exponentially.
