Two Stage Miller Compensated Op-Amp design in 180 nm CMOS for High Gain Methodology
Two Stage Miller Compensated Op-Amp design in 180 nm CMOS for High Gain Methodology
A. K. Tiwari
Abstract
This paper discusses a CMOS two degree operational amplifier has been supplied which operates at 2.5 V power deliver at 180 nm era and whose input is th bandwidth operational amplifiers exists for certain applications. This requires research in the vicinity of op amp bandwidth extension without affecting different rusted Bias Current. The supply voltage has been scaled all the way down to lessen common power consumption of the system. The fundamental intention of our work is to lower energy dissipation, high gain and high swing. At huge supply voltages, there is a alternate-off amongst speed, strength and benefit. Performance of any circuit relies upon upon velocity, power and benefit. This op-amp has very low standby power consumption with a high driving capability and operates at low voltage so that the circuit operates at low strength.
