Transmission Line Intra-pair Skew Analysis and Management on PCIe 6.0

In this paper, the impact of the intra-pair skew of printed circuit board (PCB) trace and the related compensation scheme is studied at Peripheral Component Interconnect Express (PCIe) 6.0 Pulse Amplitude Modulation 4 (PAM4) 64 Gbps speed. The skew is introduced and compensated in the actual PCB layout and modeled in mixed 2-D and 3-D modeling tools for both stripline and microstrip. The intra-pair skew modeling method is verified through correlations between simulation and measurement results. The sensitivity of the link performance to the amount of skew, and compensation location is thoroughly analyzed. PCB trace skew management guidelines for PCIe 6.0 channels are provided.