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Next Generation TSMC-SoIC® Platform for Ultra-High Bandwidth HPC Application

Yen-Ming Chen,T. Ko,37 Authors,K. C. Hsu

2024 · DOI: 10.1109/IEDM50854.2024.10873473
International Electron Devices Meeting · 1 Citations

TLDR

This innovative 3D technology, in conjunction with TSMC's cutting-edge System-on-Chip (SoC) process nodes and advanced package solutions, pushes the boundaries of Moore's Law for the next generation of High-Performance Computing (HPC) applications.

Abstract

This work introduces the next generation System-on-Integrated-Chips (SoIC) 3D stacking technology, which facilitates ultra-high bandwidth density die-to-die links between stacked dies with outstanding electrical, thermal, and reliability characteristics. The device performance remains stable throughout carefully managed manufacturing processes, as evidenced by the transistor and functional circuit block measurement data obtained from an electrical test vehicle (eTV). This innovative 3D technology, in conjunction with TSMC's cutting-edge System-on-Chip (SoC) process nodes and advanced package solutions, pushes the boundaries of Moore's Law for the next generation of High-Performance Computing (HPC) applications.

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