Low-Power High-Speed On-Chip 5 to 1 Serializer in 180 nm Technology
Low-Power High-Speed On-Chip 5 to 1 Serializer in 180 nm Technology
Aicha Menssouri,Karim El khadiri,2 Authors,A. Tahiri
2021 · DOI: 10.1007/978-3-030-73882-2_148
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TLDR
The design of Low-Power High-Speed On-Chip 5 to 1 Serializer architecture in 180 nm Technology that is used to perform the data serialization function in a SerDes system is presented.