In-Place Signal and Power Noise Waveform Capturing Within 3-D Chip Stacking
In-Place Signal and Power Noise Waveform Capturing Within 3-D Chip Stacking
M. Nagata,S. Takaya,H. Ikeda
2015 · DOI: 10.1109/MDAT.2015.2448537
IEEE design & test · 8 Citations