High bandwidth low power interposer interconnect challenge, design, and validation in 3D silicon stacked interconnect (SSI) technology
High bandwidth low power interposer interconnect challenge, design, and validation in 3D silicon stacked interconnect (SSI) technology
Anna Wong,G. Tsui,2 Authors,Yong Wang
2016 · DOI: 10.1109/ISEMC.2016.7571687
3 Citations