Design space exploration for PIM architectures in 3D-stacked memories
Design space exploration for PIM architectures in 3D-stacked memories
J. P. C. Lima,P. C. Santos,2 Authors,L. Carro
2018 · DOI: 10.1145/3203217.3203280
ACM International Conference on Computing Frontiers · 27 Citations
TLDR
The results show that the most straightforward approach can provide the highest performance while consuming the lowest amount of area and power, which makes it the most suitable design found in this survey for an energy-efficient in-memory accelerator, whether it goes in High-Performance Computing or Embedded Systems.