Cryogenic Low-Drop-Out Regulators Fully Integrated with Quantum Dot Array in 22-nm FD-SOI CMOS

This brief presents two monolithically integrated output-capacitor-less (“caples”) low-drop-out (LDO) linear regulators implemented in 22-nm fully depleted silicon-on-insulator (FD-SOI) to support on-die scalable CMOS charge-based quantum processing unit (QPU). The proposed LDOs are used to regulate 0.8 V and 1.5 V input voltages for the programmable capacitive digital-to-analog converter (CDAC) and single-electron detector, respectively. Measured results show that both LDOs can maintain their respective output voltages with a maximum deviation <2% from ~270 K down to ~ 3.7 K.