UPDF AI

A 1.8 V, 10 mA low dropout voltage regulator for IoT application in 90 nm CMOS technology

Said EL Mouzouade,Karim El khadiri,A. Tahiri

2023 · DOI: 10.11591/ijpeds.v14.i4.pp2301-2306
0 Citations

TLDR

A complementary metal-oxide-semiconductor CMOS low dropout voltage regulator (LDO) design flow using 90 nm CMOS technology is described and simulated and make the designed circuit suitable for IoT application.

Abstract

A complementary metal-oxide-semiconductor CMOS low dropout voltage regulator (LDO) design flow using 90 nm CMOS technology is described and simulated in this paper. The circuit consists of an analogue LDO with using PMOS pass device, an error amplifier, a bandgap voltage, a biasing circuit, a feedback resistive network sized to have the desired closed loop gain. This LDO was designed to maintain stable voltage at 1.8 V and 10 mA of current output in low resistive load. The LDO regulator achieves 105 uA quiescent current, -47 PSRR@13 KHz noise frequency. The final design occupies approximately 0.05 mm2. The results were satisfying and make the designed circuit suitable for IoT application.